408 lines
9.1 KiB
NASM
408 lines
9.1 KiB
NASM
smallCharLine:
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addiu sp, sp, -0x50
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sw s7, 0x44(sp)
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move s7, a0 ; s7 = text_ptr
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sw s0, 0x28(sp)
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move s0, a1 ; s0 = X
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sw s2, 0x30(sp)
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move s2, a2 ; s2 = Y
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sw s8, 0x48(sp)
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move s8, s0 ; s8 = X (copy)
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lui t0, 0xFF
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ori t0, t0, 0xFFFF
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sw s1, 0x2C(sp)
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andi s1, a3, 0xFF ; s1 = color
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move a0, s1
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sw s5, 0x3C(sp)
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lui s5, 0x8008
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lui a2, 0xFF00
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lui v0, 0x8000
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move t5, s5
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lw v1, -0x6C20(s5) ; TextDMANexChainAddr
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lw a3, 0x60(sp)
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addiu t5, t5, -0x6C20
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sw ra, 0x4C(sp)
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sw s6, 0x40(sp)
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sw s4, 0x38(sp)
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sw s3, 0x34(sp)
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; === DMA INITIALIZATION ===
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and a2, v1, a2
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andi a1, a3, 0xFF
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and v1, v1, t0
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or s4, v1, v0 ; s4 = DMA base
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andi a3, a3, 0x10
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sltu a3, zero, a3
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lw v0, 0x4(t5) ; TextDMACounter
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lw v1, 0x0(s4)
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addiu v0, v0, -1
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and v1, v1, t0
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or a2, a2, v1
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sw v0, 0x4(t5)
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sw a2, -0x6C20(s5)
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jal FUN_8001adc8
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sw a3, 0x18(sp)
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; === CHARACTER SETUP ===
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move a0, s4
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sll s0, s0, 0x10
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sra a1, s0, 0x10
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sll s2, s2, 0x10
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sra s0, s2, 0x10
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move a2, s0
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jal FUN_80019d70
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move a3, s1
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; === GPU REGISTER SETUP ===
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lui a1, 0x1F80
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ori a1, a1, 0x0348
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li v0, 0x2
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li a3, 0xC
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sh v0, 0x14(sp)
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li v0, 0x10
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sh a3, 0x16(sp)
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sb v0, 0x3(a1)
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lui v0, 0xA000
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sw v0, 0x4(a1)
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lhu v1, 0x9C(gp) ; DAT_80078f40
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lhu a0, 0x9E(gp) ; DAT_80078f42
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lui v0, 0x100
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lui at, 0x1F80
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sw v0, 0x388(at)
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lw v0, 0x14(sp)
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lui s3, 0x1F80
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sh v1, 0x10(sp)
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sh a0, 0x12(sp)
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lw v1, 0x10(sp)
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lh a0, 0x9C(gp)
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ori s3, s3, 0x3D0
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sw v0, 0xC(a1)
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lui v0, 0x8001
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move a2, a0
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sw v1, 0x8(a1)
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; === PATTERN SETUP ===
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lui t5, 0x1F80
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ori t5, t5, 0x2E0
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addiu t8, v0, 0x3E8
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lwl t6, 0x3(t8)
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lwr t6, 0x0(t8)
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lwl t7, 0x7(t8)
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lwr t7, 0x4(t8)
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swl t6, 0x3(t5)
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swr t6, 0x0(t5)
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swl t7, 0x7(t5)
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swr t7, 0x4(t5)
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lwl t6, 0xB(t8)
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lwr t6, 0x8(t8)
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lwl t7, 0xF(t8)
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lwr t7, 0xC(t8)
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swl t6, 0xB(t5)
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swr t6, 0x8(t5)
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swl t7, 0xF(t5)
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swr t7, 0xC(t5)
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lwl t6, 0x13(t8)
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lwr t6, 0x10(t8)
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lwl t7, 0x17(t8)
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lwr t7, 0x14(t8)
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swl t6, 0x13(t5)
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swr t6, 0x10(t5)
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swl t7, 0x17(t5)
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swr t7, 0x14(t5)
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lwl t6, 0x1B(t8)
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lwr t6, 0x18(t8)
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lwl t7, 0x1F(t8)
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lwr t7, 0x1C(t8)
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swl t6, 0x1B(t5)
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swr t6, 0x18(t5)
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swl t7, 0x1F(t5)
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swr t7, 0x1C(t5)
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; === SPRITE COMMAND SETUP ===
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li v0, 0x4
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sb v0, 0x3(s3)
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li v0, 0x64
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sb v0, 0x7(s3)
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li v0, 0x80
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sb v0, 0x4(s3)
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sb v0, 0x5(s3)
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bgez a0, calc_x_offset
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sb v0, 0x6(s3)
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addiu a2, a0, 0x3F
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calc_x_offset:
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sra v0, a2, 0x6
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sll v0, v0, 0x6
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subu v0, a0, v0
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lh v1, 0x9E(gp)
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sll v0, v0, 0x2
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sb v0, 0xC(s3)
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bgez v1, calc_y_offset
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move v0, v1
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addiu v0, v1, 0xFF
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calc_y_offset:
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sra v0, v0, 0x8
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sll v0, v0, 0x8
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subu v0, v1, v0
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sb v0, 0xD(s3)
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lhu v1, 0xA4(gp) ; DAT_80078f48
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li v0, 0x8
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sh v0, 0x10(s3)
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sh a3, 0x12(s3)
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sh v1, 0xE(s3)
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; === MAIN TEXT LOOP ===
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lbu a1, 0x0(s7)
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beq a1, zero, finish
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addiu s7, s7, 0x1
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move s6, s5
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lui s5, 0x8008
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addiu s5, s5, -0x6C20
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sw s0, 0x1C(sp)
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lui s0, 0xFF
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ori s0, s0, 0xFFFF
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sw s2, 0x20(sp)
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text_loop:
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addiu v1, a1, -0x67
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sltiu v0, v1, 0x13
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beq v0, zero, switch_default
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sll v0, v1, 0x2
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lui t6, 0x8001
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addiu t6, t6, 0x4A0
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addu v0, v0, t6
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lw v0, 0x0(v0)
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jr v0
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switch_cases:
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lw t7, 0x1C(sp)
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j after_switch
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addiu s2, t7, 0x2
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switch_default:
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lw t8, 0x20(sp)
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sra s2, t8, 0x10
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after_switch:
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lw t5, 0x18(sp)
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beq t5, zero, normal_pos
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addiu a1, a1, -0x20
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lui v0, 0x8001
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addiu v0, v0, 0x43C
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addu v0, a1, v0
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lui v1, 0x8001
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lbu v0, 0x0(v0)
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addiu v1, v1, 0x428
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sll v0, v0, 0x1
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addu v0, v0, v1
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lbu v1, 0x0(v0)
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lbu v0, 0x1(v0)
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subu v1, s8, v1
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sll a0, v1, 0x10
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sra s1, a0, 0x10
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j pos_calculated
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addu s8, v0, v1
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normal_pos:
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sll v1, s8, 0x10
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lhu v0, 0x4(s4)
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sra v1, v1, 0x10
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sll v0, v0, 0x3
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addu s1, v1, v0
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pos_calculated:
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jal FUN_80019f84
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move a0, a1
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lui t4, 0x8000
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lui t2, 0xFF00
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move t1, s4
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lui t3, 0x1F80
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ori t3, t3, 0x388
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move t0, s4
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sh s1, 0x8(s3)
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sh s2, 0xA(s3)
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; === DMA CHAIN PROCESSING ===
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dma_loop:
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lw v0, -0x6C20(s6)
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and a0, v0, t2
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and v0, v0, s0
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or a1, v0, t4
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lw v0, 0x4(s5)
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lw v1, 0x0(a1)
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addiu v0, v0, -1
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and v1, v1, s0
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or a0, a0, v1
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sw v0, 0x4(s5)
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sw a0, -0x6C20(s6)
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lw t6, 0x0(s3)
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lw t7, 0x4(s3)
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lw t8, 0x8(s3)
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lw t5, 0xC(s3)
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sw t6, 0x0(a1)
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sw t7, 0x4(a1)
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sw t8, 0x8(a1)
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sw t5, 0xC(a1)
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lw t6, 0x10(s3)
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sw t6, 0x10(a1)
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lw v1, 0x18(t0)
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lw v0, 0x0(a1)
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lw v1, 0x0(v1)
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and v0, v0, t2
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and v1, v1, s0
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or v0, v0, v1
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sw v0, 0x0(a1)
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lw a0, 0x18(t0)
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lw v0, 0x0(a0)
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and v1, a1, s0
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and v0, v0, t2
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or v0, v0, v1
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sw v0, 0x0(a0)
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sw a1, 0x18(t0)
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lhu v0, 0x4(t1)
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beq v0, zero, is_first
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nop
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j not_first
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nop
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is_first:
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sw a1, 0x28(t0)
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sh s1, 0xC(t1)
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sh s2, 0xE(t1)
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not_first:
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lui a1, 0x1F80
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ori a1, a1, 0x348
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lw v0, -0x6C20(s6)
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and a0, v0, t2
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and v0, v0, s0
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or a3, v0, t4
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move a2, a3
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lw v0, 0x4(s5)
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lw v1, 0x0(a3)
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addiu v0, v0, -1
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and v1, v1, s0
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or a0, a0, v1
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sw v0, 0x4(s5)
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andi v0, a3, 0x3
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beq v0, zero, aligned_copy
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sw a0, -0x6C20(s6)
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unaligned_copy:
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lwl t6, 0x3(a1)
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lwr t6, 0x0(a1)
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lwl t7, 0x7(a1)
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lwr t7, 0x4(a1)
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lwl t8, 0xB(a1)
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lwr t8, 0x8(a1)
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lwl t5, 0xF(a1)
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lwr t5, 0xC(a1)
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swl t6, 0x3(a2)
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swr t6, 0x0(a2)
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swl t7, 0x7(a2)
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swr t7, 0x4(a2)
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swl t8, 0xB(a2)
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swr t8, 0x8(a2)
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swl t5, 0xF(a2)
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swr t5, 0xC(a2)
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addiu a1, a1, 0x10
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bne a1, t3, unaligned_copy
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addiu a2, a2, 0x10
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j copy_done
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nop
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aligned_copy:
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lw t6, 0x0(a1)
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lw t7, 0x4(a1)
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lw t8, 0x8(a1)
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lw t5, 0xC(a1)
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sw t6, 0x0(a2)
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sw t7, 0x4(a2)
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sw t8, 0x8(a2)
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sw t5, 0xC(a2)
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addiu a1, a1, 0x10
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bne a1, t3, aligned_copy
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addiu a2, a2, 0x10
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copy_done:
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lwl t6, 0x3(a1)
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lwr t6, 0x0(a1)
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swl t6, 0x3(a2)
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swr t6, 0x0(a2)
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lw v1, 0x18(t0)
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lw v0, 0x0(a3)
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lw v1, 0x0(v1)
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and v0, v0, t2
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and v1, v1, s0
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or v0, v0, v1
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sw v0, 0x0(a3)
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lw a0, 0x18(t0)
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lw v0, 0x0(a0)
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and v1, a3, s0
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and v0, v0, t2
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or v0, v0, v1
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sw v0, 0x0(a0)
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sw a3, 0x18(t0)
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addiu t0, t0, 0x4
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addiu v0, t1, 0x8
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sltu v0, t0, v0
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bne v0, zero, dma_loop
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nop
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lhu v0, 0x4(s4)
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addiu v0, v0, 0x1
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sh v0, 0x4(s4)
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lbu a1, 0x0(s7)
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bne a1, zero, text_loop
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addiu s7, s7, 0x1
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; === CLEANUP ===
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finish:
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clear s2
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lui s3, 0x8008
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addiu s5, s3, -0x6C20
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lui s1, 0xFF
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ori s1, s1, 0xFFFF
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move s0, s4
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clear a1
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cleanup_loop:
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li a2, 0x1
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addu s2, s2, a2
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lui v0, 0x8000
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lui a0, 0xFF00
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lw v1, -0x6C20(s3)
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lw a3, 0xA0(gp)
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and v1, v1, s1
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or v1, v1, v0
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sw v1, 0x30(s0)
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lw v0, -0x6C20(s3)
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lw v1, 0x0(v1)
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and v0, v0, a0
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and v1, v1, s1
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lw a0, 0x4(s5)
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or v0, v0, v1
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sw v0, -0x6C20(s3)
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addiu a0, a0, -1
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sw a0, 0x4(s5)
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lw a0, 0x30(s0)
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jal SetDrawTPage
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addiu s0, s0, 0x4
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sltiu v0, s2, 0x2
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bne v0, zero, cleanup_loop
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clear a1
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move v0, s4
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lw ra, 0x4C(sp)
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lw s8, 0x48(sp)
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lw s7, 0x44(sp)
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lw s6, 0x40(sp)
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lw s5, 0x3C(sp)
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lw s4, 0x38(sp)
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lw s3, 0x34(sp)
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lw s2, 0x30(sp)
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lw s1, 0x2C(sp)
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lw s0, 0x28(sp)
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jr ra
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addiu sp, sp, 0x50 |